[HGI-news-int] CHES 2016 - Call for Papers +++ Please note important updates +++

Mon Feb 15 16:13:59 CET 2016

We apologize for multiple mailings. - Christof

-------- Weitergeleitete Nachricht --------
Betreff: 	CHES 2016 - Call for Papers +++ Please note important updates +++
Datum: 	Mon, 15 Feb 2016 10:01:10 -0500
Von: 	Thomas Eisenbarth <teisenbarth at WPI.EDU>
An: 	mailinglist at chesworkshop.org <mailinglist at chesworkshop.org>

+++ Please note important updates +++

Conference on Cryptographic Hardware and Embedded Systems (CHES)
          Santa Barbara, USA - August 17-19, 2016
		  http://www.chesconference.org

Call for Papers
===============

The annual CHES conference highlights new results in the design and
analysis of cryptographic hardware and software implementations. The
conference builds a valuable bridge between the research and
cryptographic engineering communities and attracts participants from
industry, academia, and government organizations. In addition to a
single track of high-quality presentations, CHES 2016 will offer invited
talks, tutorials, a poster session, a rump session, and a panel
discussion. All submitted papers will be reviewed by at least four
Program Committee members. Program committee members are allowed to
submit one paper, and a second one if both submissions are co-authored.
Any Program Committee member submission will be reviewed by at least
five Program Committee members. Program chairs are not allowed to
submit. Authors will be invited to submit brief rebuttals of the reviews
before the final decisions are made. Topics suitable for CHES 2016
include, but are not limited to:

Cryptographic implementations
-----------------------------
o Hardware architectures
o Cryptographic processors and co-processors
o True and pseudorandom number generators
o Physical unclonable functions (PUFs)
o Efficient software implementations

Tools and methodologies
-----------------------
o Computer aided cryptographic engineering
o Verification methods and tools for secure design
o Metrics for the security of embedded systems
o Secure programming techniques
o FPGA design security
o Formal methods for secure hardware and software

Interactions between cryptographic theory and implementation issues
-------------------------------------------------------------------
o New and emerging cryptographic algorithms and protocols targeting
embedded devices
o Special-purpose hardware for cryptanalysis
o Leakage resilient cryptography

Attacks against implementations and countermeasures
---------------------------------------------------
o Side-channel attacks and countermeasures
o Fault attacks and countermeasures
o Hardware tampering and tamper-resistance
o White-box cryptography and code obfuscation
o Hardware and software reverse engineering

Applications
------------
o Cryptography and security for the Internet of Things (RFID, sensor
networks, smart devices, smart meters, etc.)
o Hardware IP protection and anti-counterfeiting
o Reconfigurable hardware for cryptography
o Smart card processors, systems and applications
o Security for cyberphysical systems (home automation, medical implants,
industrial control, etc.)
o Automotive security
o Secure storage devices (memories, disks, etc.)
o Technologies and hardware for content protection
o Trusted computing platforms

Instructions for CHES Authors
-----------------------------
Submissions must be anonymous with no author names, affiliations,
acknowledgments, or obvious references. Papers should begin with a
title, a short abstract, and a list of keywords. All submissions must
follow Springer's LNCS format
(http://www.springer.com/computer/lncs/lncs+authors) without changing
default margins, fonts, etc. The total page limit is 18 pages excluding
references. Supplementary materials that facilitate verification of the
results, e.g. source code, proof details, etc., may be appended without
a page limit or uploaded as separate files, but reviewers are neither
required to read them nor will they be printed in the proceedings. Hence
submissions must be complete, intelligible and self-contained within the
18 pages bound. Papers should have page numbers to facilitate their
review. In Latex this can be achieved for instance using \pagestyle{plain}.

All submissions will be blind-refereed and submissions which
substantially duplicate work published elsewhere, or submitted in
parallel to any other conference or workshop with proceedings, will be
instantly rejected: see the IACR Policy on Irregular Submissions
(http://www.iacr.org/docs/irregular.pdf) and the Guidelines for Authors
(http://www.iacr.org/docs/author.pdf). Note that any submission to CHES
2016 implies the full acknowledgment and commitment of the authors to
the entire review process. A withdrawal of any paper prior to
the notification deadline will be accepted only in exceptional cases
(i.e., severe technical flaws discovered after the submission deadline).

Details of the electronic submission procedure will be posted on the
conference website. The final proceedings of CHES 2016 will be published
by Springer in the LNCS series and accepted papers must conform to
Springer publishing requirements. At least one author of an accepted
paper must attend CHES 2016 to present the paper.

Important Dates
----------------
o Submission deadline: March 4, 2016, 23:59 PST
o Referee comments to authors: April 22, 2016
o Author response to comments: April 28, 2016
o Paper notification: May 16, 2016
o Final version due: June 6, 2016
o Workshop dates: August 17 - 19, 2016

Conflicts of Interest
---------------------
The program co-chairs invite authors to help preventing submissions from
being evaluated by reviewers who have a conflict of interest. CHES
follows the rules and guidelines of IACR with respect to identifying
conflicts of interest. During submission to CHES 2016 authors must
declare any conflict of interest with Program Committee members that
might influence an impartial judgment of their submission. A conflict of
interest exists for example if an author and a Program Committee member:
o have a currently ongoing research collaboration
o have been affiliated to the same institution in the last 3 years
o have been in a student-advisor relationship in the last 5 years
o have jointly published more than one paper in the last 3 years
o have personal ties (family, friends, etc.).

For co-authored submissions a conflict of interest exists if at least
one co-author has a conflict of interest.

Program Committee
-----------------
J. Balasch, KU Leuven, BE.
L. Batina, Radboud University, NL.
D. J. Bernstein, University of Illinois at Chicago, US, and Technische
Universiteit Eindhoven, NL.
G. Bertoni, STMicroelectronics, IT.
C.-M. Cheng, National Taiwan University, TW.
E. De Mulder, Cryptography Research, FR.
H. Drexler, Giesecke & Devrient, DE.
O. Dunkelman, University of Haifa, IL.
J. Fan, Open Security Research, CN.
S. Faust, Ruhr-Universität Bochum, DE.
V. Fischer, Jean Monnet University Saint-Etienne, FR.
W. Fischer, Infineon Technologies, DE.
B. Gierlichs, KU Leuven, BE.
H. Gilbert, ANSSI, FR.
C. Giraud, Oberthur Technologies, FR.
D. Holcomb, University of Massachusetts Amherst, US.
N. Homma, Tohoku University, JP.
M. Hutter, Cryptography Research, US.
K. Järvinen, Aalto University, FI.
M. Joye, Technicolor, US.
L. R. Knudsen, Technical University of Denmark, DK.
K. Lemke-Rust, Bonn-Rhein-Sieg University of Applied Sciences, DE.
T. Lepoint, CryptoExperts, FR.
Y. Li, Nanjing University of Aeronautics and Astronautics, CN.
R. Maes, Intrinsic-ID, NL.
M. Matsui, Mitsubishi Electric, JP.
M. Medwed, NXP Semiconductors, AT.
A. Moradi, Ruhr-Universität Bochum, DE.
D. Mukhopadhyay, Indian Institute of Technology Kharagpur, IN.	
D. Naccache, École normale supérieure, FR.
E. Oswald, University of Bristol, UK.
D. Page, University of Bristol, UK.
T. Peyrin, Nanyang Technological University, SG.
A. Poschmann, NXP Semiconductors, DE.
E. Prouff, ANSSI, FR.
F. Regazzoni, ALaRI-USI, CH.
M. Rivain, CryptoExperts, FR.
A. Schlösser, NXP Semiconductors, DE.
S. Skorobogatov, University of Cambridge, UK.
M. Sönmez Turan, NIST, US.
M. Stöttinger, Continental Teves, DE.
B. Sunar, Worcester Polytechnic Institute, US.
H. Thiebeauld, eshard, FR.
O. Thomas, Texplained, FR.
M. Tibouchi, NTT Secure Platform Laboratories, JP.
S. Trimberger, Xilinx, US.
I. Verbauwhede, KU Leuven, BE.
A. Weimerskirch, University of Michigan, US.
B. Wyseur, NAGRA, CH.

Poster and Tutorial Sessions
----------------------------
CHES 2016 will include a poster session and the Call for Posters will be
available via the conference website. The program co-chairs also welcome
proposals for half-day tutorials at CHES 2016. The presenter of an
accepted proposal will be offered a complimentary registration to CHES
2016 and a fixed stipend towards their travel costs. More details will
be available via the CHES 2016 conference website.

CHES Challenge
--------------
CHES 2016 published a Call for Challenges Proposals. Please see the
conference website for details.

Contact
-------
All correspondence and questions regarding the technical program should
be directed to the program co-chairs Benedikt Gierlichs and Axel
Poschmann at ches2016programchairs at iacr.org.

======================================================================== 
Prof. Christof Paar
Chair for Embedded Security 
Dept. Electrical Engineering & Information Technology 
Ruhr University Bochum, Germany 

www.crypto-textbook.com 

URL: www.emsec.rub.de 
mobile USA: (00) 1 413 210 4737 
======================================================================== 

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